![]() Henceforth, a careful design and analysis is very much essential in designing these building blocks of VLSI circuits that is, designing XOR and XNOR gates. XOR and XNOR gates are the fundamental components in designing of VLSI based circuits like adders, multipliers, comparators, multiplexers, demultiplexers, phase locked loop and so on. Nowadays, the primary concern for any Very Large-Scale Integration (VLSI) system designers focuses mainly on System on Chip (SoC) design of VLSI circuits pertaining to minimum transistor count, thereby reducing the area consumption, power consumption, which is a crucial factor to be taken into consideration in case of any processor. KeywordsPass transistor logic XOR and XNOR gates area delay Simulation results obtained in the mentor graphics tool are used to compare the number of transistor usage, area consumption, delay between 8- T and 5-T based XOR and XNOR gates and it proves that 5-T based design is the best in all the above-mentioned parameters. This paper presents the design of XOR and XNOR gates using pass transistor logic. There are various CMOS logic structures available to design digital VLSI circuits, like, pass transistor logic, transmission gate logic, pseudo NMOS logic, CMOS logic, dynamic and domino CMOS logic, clocked CMOS logic, CVSL logic and so on. In the modern era, VLSI technology demands the circuit design with least area consumption, least power consumption and high speed in operation. Design and Analysis of 8-T and 5-T based XOR and XNOR gates using Soft Computing Toolsĭepartment of Electronics & Communication Engineering Shri Madhwa Vadiraja Institute of Technology and Management, Bantakal, Udupi, Indiaĭepartment of Electronics & Communication Engineering Shri Madhwa Vadiraja Institute of Technology and Management, Bantakal Udupi, Indiaĭepartment of Electronics & Communication Engineering Shri Madhwa Vadiraja Institute of Technology and Management,Ībstract XOR and XNOR gates are the basic building block of arithmetic and logic circuits.
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